The present invention relates to a line terminal circuit according to the preamble of claim 1. A circuit of this kind is known from WO-A-95 26128.
For the transmission of digital signals between different circuit sections of a digital system, line terminal circuits are used as interfaces between a transmission line and digital circuits providing data for transmission or receiving transmitted data. A line terminal circuit usually comprises some kind of buffer section which acts as a line driver or as a line receiver, depending on whether the line terminal circuit is designed for operating at the transmitting end of the transmission line or at its receiving end.
In larger systems it can happen that for whatever reason, different system sections employ different logic standards with different signalling voltage levels. Well known examples of such logic standards are TTL, ECL, DPECL, LVDS and so on. Also, reference voltage offsets, e.g. ground voltage offsets, and the like can occur between different sections of the system. If a symmetric transmission line (e.g. twisted pair) is used, in some cases there may be no fixed common reference at all between the transmitting side and the receiving side (this latter situation is called xe2x80x9cfloatingxe2x80x9d).
If an asymmetric transmission line is used, a reference voltage offset between the transmitter side and the receiver side will appear as a DC bias voltage superimposed on the signalling voltage. If a symmetrical transmission line is used, such offset will appear, e.g. at the receiver end as a common mode voltage on both conductors of the transmission line with respect to the ground potential of the receiver. For the sake of brevity, in the following only the term xe2x80x9ccommon mode voltagexe2x80x9d will be used for both cases of an asymmetric and a symmetric transmission line.
In order to cope with situations of this kind it can be advantageous to design the line terminal circuit at the transmitting and/or receiving end such that a certain common mode voltage present on the transmission line is tolerated. Examples of such designs on the receiving side include the use of well known operational amplifiers with a sufficiently large input common mode voltage range. Examples of such designs in the transmitting line terminal circuit include supplying the driver with power by means of connecting it between a series connection of constant current sources, such that the supply voltage of the driver circuit, and hence the common mode voltage output by the driver, may float up and down without affecting the operation of the driver circuit. Another example is a driver that drives the transmission line with signalling currents rather than with signalling voltages.
Of course, there will be limits for the range, within which such a line terminal circuit will be able to work. If the common mode voltage exceeds the upper or lower limit of this range, proper signal transmission or reception can no longer be performed by the respective line terminal circuit and the circuit may even be damaged.
It is the object of the present invention, to provide a line terminal circuit which can properly operate over a significantly extended common mode voltage range and which can be integrated on a semiconductor chip without requiring much space on the chip surface.
According to the present invention this object is solved as defined in claim 1.
Advantageous embodiments are given in the dependent claims.
According to the present invention, currents are injected or withdrawn into or from the transmission line in order to raise or lower the common mode voltage component to such an extent that the resulting common mode voltage falls within an operating window of the transmitter line terminal circuit and receiver line terminal circuit, respectively. Due to the action of the current control section, the current injected or withdrawn is adjusted such that its magnitude can counteract the cause for an excessive common mode voltage at the transmitter or receiver end of the transmission line.
Preferably, resistances with preferably equal values are connected in series with the conductors of the transmission line, such that a current injected by the controllable current source results in respective voltage drops across these resistors. The voltage drops can then counteract the cause for the undesired common mode voltage. The resistances are preferably located such that they do not adversely affect the proper termination of the transmission line. As an example, these resistances can be located at the receiving end between the line termination network and the input terminals of the buffer section, the current source for the respective conductor of the transmission line then being connected to the node between the respective input terminal of the buffer and the respective resistance.
A system for transmitting digital data via a transmission line preferably comprises a respective line terminal circuit in accordance with the invention both at the transmitting end and at the receiving end of the line. In this case the line terminal circuit at one end can take up or provide the current injected or withdrawn by the line terminal circuit at the other end while independently maintaining the common mode voltage at both ends within proper limits.
A predetermined fixed common mode voltage can be achieved if the limits of the common mode range set in the control section, are made substantially coincident. In this case the control section will control the common mode voltage to approximate or equal a predefined common mode voltage target value.